Advanced Analog IC Design
Spring 2008, Boise State University
Lecture notes are here
Homework assignments, project information, and due dates are located here
Current grades are here
Textbook: CMOS Circuit
Design, Layout and
Simulation, Revised Second Edition (Chapters 8, 25-29)
Instructor: Jake Baker
Time: 6:30 to 7:45 pm MW
dates: Wednesday, January
23 to Wednesday, May 7
Location: MEC 106
Holidays: Monday, February 18
Saturday, March 22 to Sunday, March 30 (spring break)
Final Exam time: Wednesday, May 14 6:00 to 8:00 pm
Course content Ė Advanced analog design considerations including: noise, common-mode feedback, high-speed, design for signal processing, filter design. PREREQ: ECE 411/511.
Email questions should be sent to the CMOSedu google group (not directly to the instructor).
While the instructor may likely respond quickly, questions for the instructor (only) should be
asked in person during his office hours.
No laptops or Internet appliances can be used during lectures.
No late work accepted. All assigned work is due at the beginning of class.
Neither the final exam nor final project will be returned at the end of the semester.
Regularly being tardy for lectures, leaving in the middle of lectures, or earlier from lectures is unacceptable without prior consent of the instructor
Cheating or plagiarism will result in an automatic F grade in the course (so do your own homework and projects!)