# header information:
Hece5410_s10|8.11

# Views:
Vicon|ic
Vlayout|lay
Vschematic|sch

# External Libraries:

Lspiceparts|spiceparts

# Technologies:
Tmocmos|ScaleFORmocmos()D300.0|mocmosAnalog()BT|mocmosNumberOfMetalLayers()I3

# Cell 2_1_divider;1{lay}
C2_1_divider;1{lay}||mocmos|1264643496625|1264644942580||DRC_last_good_drc_area_date()G1264643629266|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264643629266
IR_8k_nw;1{lay}|R_8k_nw@0||1|0|||D5G4;
IR_8k_nw;1{lay}|R_8k_nw@1||1|-28|||D5G4;
Ngeneric:Facet-Center|art@0||0|0||||AV
X

# Cell 2_1_divider_v1;1{lay}
C2_1_divider_v1;1{lay}||mocmos|1264643496625|1265854017924||DRC_last_good_drc_area_date()G1264644399347|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264644399347
NMetal-1-Pin|pin@0||-64.5|25||||
NMetal-1-Pin|pin@1||-65.5|-70||||
Ngeneric:Invisible-Pin|pin@10||-3|-20|||||SIM_spice_card(D5G5;)S[Vin vin 0 DC 4,.tran 0 1]
NN-Well-Resistor|q|D5G1;|0|-51|79||||SCHEM_resistance(D5G5;)S8k
NN-Well-Resistor|resnwell@0||0|0|79||||SCHEM_resistance(D5G5;)S8k
AMetal-1|Vout|D5G5;||S2700|q|right|64.5|-51|resnwell@0|right|64.5|0
AMetal-1|net@1|||S900|q|left|-65.5|-51|pin@1||-65.5|-70
AMetal-1|vin|D5G5;||S2700|resnwell@0|left|-64.5|0|pin@0||-64.5|25
Egnd||D5G5;|pin@1||U
X

# Cell 2_1_divider_v1;1{sch}
C2_1_divider_v1;1{sch}||schematic|1264644540486|1264644758384|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||12|-3||||
Ngeneric:Invisible-Pin|pin@0||1|0|||||SIM_spice_card(D5G1;)S[Vin vin 0 DC 4,.tran 0 1]
NWire_Pin|pin@1||12|6||||
NWire_Pin|pin@2||4|6||||
NResistor|resnwell@0||9|6||||3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k
NResistor|resnwell@1||12|2|||R|3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k
Awire|net@1|||900|pin@1||12|6|resnwell@1|b|12|4
Awire|net@3|||2700|gnd@0||12|-1|resnwell@1|a|12|0
Awire|vin|D5G1;||0|resnwell@0|a|7|6|pin@2||4|6
Awire|vout|D5G1;||1800|resnwell@0|b|11|6|pin@1||12|6
X

# Cell 10_1;1{sch}
C10_1;1{sch}||schematic|1270513507576|1270514006785|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||-1|6|||||SCHEM_capacitance(D5G1;X-2;Y1.25;)S1p
NCapacitor|cap@1||10.75|6.75|||||SCHEM_capacitance(D5G1;X-2.5;)S10p
NGround|gnd@0||3|-3.25||||
NGround|gnd@1||10.75|1.5||||
NTransistor|nmos@0||1|2|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@0||-9.25|2||||
NWire_Pin|pin@1||-1|2||||
NWire_Pin|pin@2||-1|10||||
NWire_Pin|pin@3||3|10||||
NWire_Pin|pin@4||10.75|10||||
Ngeneric:Invisible-Pin|pin@5||-6.75|-2.25|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC 0 Pulse 0 5 5n 100p,".include C:\\Electric\\C5_models.txt",.ic v(vout)=5,.tran 100p 200n,.meas tran Q integ I(Vin)]
NResistor|res@0||-4|2|||||SCHEM_resistance(D5G1;Y1;)S1k
Awire|Vin|D5G1;Y0.75;||0|res@0|a|-6|2|pin@0||-9.25|2
Awire|in|D5G1;||900|cap@0|b|-1|4|pin@1||-1|2
Awire|net@2|||0|nmos@0|g|0|2|pin@1||-1|2
Awire|net@3|||0|pin@1||-1|2|res@0|b|-2|2
Awire|net@5|||2700|cap@0|a|-1|8|pin@2||-1|10
Awire|net@6|||1800|pin@2||-1|10|pin@3||3|10
Awire|net@7|||900|pin@3||3|10|nmos@0|d|3|4
Awire|net@8|||2700|gnd@0||3|-1.25|nmos@0|s|3|0
Awire|net@9|||2700|cap@1|a|10.75|8.75|pin@4||10.75|10
Awire|net@11|||2700|gnd@1||10.75|3.5|cap@1|b|10.75|4.75
Awire|vout|D5G1;X-0.75;Y0.75;||1800|pin@3||3|10|pin@4||10.75|10
X

# Cell A_1_1;2{sch}
CA_1_1;2{sch}||schematic|1264040404638|1264041683685|
Ispiceparts:DCCurrent;1{ic}|DCCurren@0||10|-3|||D5G4;|ATTR_DCCurrent(D5G0.5;NP)S5uA
Ispiceparts:DCVoltage;1{ic}|DCVoltag@0||-3|-2.5|||D5G4;|ATTR_Voltage(D5G0.5;NP)S1
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||14.5|-9.5|-1|-1||
NGround|gnd@1||-3|-8|-1|-1||
NGround|gnd@2||10|-9|-1|-1||
NWire_Pin|pin@0||14.5|2||||
NWire_Pin|pin@3||-3|2||||
Ngeneric:Invisible-Pin|pin@4||3.5|-4.5|||||SIM_spice_card(D5G1;)S.op
NWire_Pin|pin@7||10|2||||
NResistor|res@0||5|2|||||SCHEM_resistance(D5G1;Y1;)S1MEG
NResistor|res@1||14.5|-2|||R||SCHEM_resistance(D5G1;RRRY-2.5;)S1MEG
Awire|Vin|D5G1;Y1;||0|res@0|a|3|2|pin@3||-3|2
Awire|Vx|D5G1;X4;Y1;||1800|pin@7||10|2|pin@0||14.5|2
Awire|net@5|||2700|res@1|b|14.5|0|pin@0||14.5|2
Awire|net@7|||2700|DCVoltag@0|plus|-3|1|pin@3||-3|2
Awire|net@8|||2700|gnd@1||-3|-6.5|DCVoltag@0|minus|-3|-6
Awire|net@13|||1800|res@0|b|7|2|pin@7||10|2
Awire|net@14|||2700|DCCurren@0|plus|10|0|pin@7||10|2
Awire|net@15|||2700|gnd@0||14.5|-8|res@1|a|14.5|-4
Awire|net@19|||2700|gnd@2||10|-7.5|DCCurren@0|minus|10|-6
X

# Cell A_1_1;1{sch}
CA_1_1;1{sch}||schematic|1264040404638|1264041123948|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||10|-7.5|-1|-1||
NWire_Pin|pin@0||10|2||||
NWire_Pin|pin@3||-3|2||||
Ngeneric:Invisible-Pin|pin@4||3.5|-3|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC 1,Ix Vx 0 DC 5u,.op]
NResistor|res@0||4.5|2|||||SCHEM_resistance(D5G1;Y1;)S1MEG
NResistor|res@1||10|-2|||R||SCHEM_resistance(D5G1;RRRY-2.5;)S1MEG
Awire|Vin|D5G1;Y1;||0|res@0|a|2.5|2|pin@3||-3|2
Awire|Vx|D5G1;Y1;||1800|res@0|b|6.5|2|pin@0||10|2
Awire|net@5|||2700|res@1|b|10|0|pin@0||10|2
Awire|net@6|||2700|gnd@0||10|-6|res@1|a|10|-4
X

# Cell CP_neg;1{sch}
CCP_neg;1{sch}||schematic|1272935958269|1272937127379|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||5.75|6.25|||R||SCHEM_capacitance(D5G1;X2.5;)S1p
NCapacitor|cap@1||18.5|3.25|||||SCHEM_capacitance(D5G1;X2.5;)S10p
NDiode|diode@0||10|3.5|||RR||SCHEM_diode(D5G1;)Sdiode
NDiode|diode@1||14.75|6.25|||R||SCHEM_diode(D5G1;)Sdiode
NGround|gnd@0||10|-1||||
NGround|gnd@1||18.5|-1.5||||
NWire_Pin|pin@0||10|6.25||||
NWire_Pin|pin@1||0.5|6.25||||
NWire_Pin|pin@2||18.5|6.25||||
Ngeneric:Invisible-Pin|pin@3||8.25|-4.75|||||SIM_spice_card(D5G1;)S[Vin osc_in 0 DC 0 pulse 0 9 0 1n 1n 9n 20n,.tran 0 2000n,.model diode D]
NWire_Pin|pin@5||23.5|6.25||||
NWire_Pin|pin@6||23.5|0.5||||
NResistor|res@0||23.5|2.75|||R||SCHEM_resistance(D5G1;)S100k
Awire|net@0|||1800|cap@0|b|7.75|6.25|pin@0||10|6.25
Awire|net@1|||900|pin@0||10|6.25|diode@0|b|10|5.5
Awire|net@2|||2700|gnd@0||10|1|diode@0|a|10|1.5
Awire|net@5|||2700|cap@1|a|18.5|5.25|pin@2||18.5|6.25
Awire|net@7|||2700|gnd@1||18.5|0.5|cap@1|b|18.5|1.25
Awire|net@10|||1800|pin@2||18.5|6.25|pin@5||23.5|6.25
Awire|net@11|||900|pin@5||23.5|6.25|res@0|b|23.5|4.75
Awire|net@12|||900|res@0|a|23.5|0.75|pin@6||23.5|0.5
Awire|net@13|||1800|gnd@1||18.5|0.5|pin@6||23.5|0.5
Awire|osc_in|D5G1;Y0.75;||0|cap@0|a|3.75|6.25|pin@1||0.5|6.25
Awire|out|D5G1;Y0.75;||1800|diode@1|b|16.75|6.25|pin@2||18.5|6.25
Awire|v_shift|D5G1;X0.25;Y0.5;||0|diode@1|a|12.75|6.25|pin@0||10|6.25
X

# Cell Fig2_19;1{sch}
CFig2_19;1{sch}||schematic|1181931511312|1265854477720|
Ngeneric:Facet-Center|art@0||0|0||||AV
NDiode|diode|D5G1;X-2.75;Y1;|-0.25|-2.5|||RR||SCHEM_diode(D5G1;Y-0.25;)S""
NGround|gnd@0||-0.25|-9.25||||
Ngeneric:Invisible-Pin|pin@0||-15.5|-1.75|||||SIM_spice_card(D5G0.75;)S[Vgnd gnd 0 DC 0,Vin Vin 0 DC 0 PULSE 10 -10 10n 0.1n 0.1n 20n 40n,.model diode D is=1e-15 tt=10E-9 cj0=1e-12 vj=0.7 m=0.33,.tran 10p 25n,.options post]
NWire_Pin|pin@1||-0.25|2.75||||
NWire_Pin|pin@2||-21.25|2.75||||
Ngeneric:Invisible-Pin|pin@3||-11.25|7.75|||||ART_message(D5G1;)SPlot Vin,VD and ID
NResistor|res@0||-11.25|2.75|||||SCHEM_resistance(D5G2;Y1.5;)S1k
Awire|D1|D5G1;X2.25;Y-3.25;||900|pin@1||-0.25|2.75|diode|b|-0.25|-0.5
Awire|VD|D5G2;X2;Y1;||1800|res@0|b|-9.25|2.75|pin@1||-0.25|2.75
Awire|Vin|D5G2;X-5.5;Y1;||0|res@0|a|-13.25|2.75|pin@2||-21.25|2.75
Awire|net@0|||2700|gnd@0||-0.25|-7.25|diode|a|-0.25|-4.5
X

# Cell Fig2_23;1{sch}
CFig2_23;1{sch}||schematic|1181931521046|1228428660890|
ITRC;2{ic}|O1|D5G4;X-5.5;Y-1;|-11|-1.25|||D5G4;
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||-23|-9||||
NGround|gnd@1||-0.25|-9||||
NGround|gnd@2||8.75|-13||||
Ngeneric:Invisible-Pin|pin@0||-28.25|7.25|||||SIM_spice_card(D5G1;)S[Vgnd gnd 0 DC 0,.model TRC ltra R=5k C=5f len=50,Vin Vin 0 DC 0 PULSE 0 1 5n,.tran 10p 100n,.options post]
Ngeneric:Invisible-Pin|pin@1||-11|7.5|||||ART_message(D5G2;)SPlot Vin and Vout
NWire_Pin|pin@4||-28.25|1.75||||
NWire_Pin|pin@5||8.75|1.5||||
NWire_Pin|pin@7||-2|1.5||||
NWire_Pin|pin@10||-0.25|-6.25||||
NWire_Pin|pin@11||-23|-6.25||||
NResistor|res@0||8.75|-4.5|||R||SCHEM_resistance(D5G2;Y-2.5;)S1G
Awire|Vin|D5G1;Y0.75;||1800|pin@4||-28.25|1.75|O1|a|-20|1.75
Awire|Vout|D5G1;Y0.75;||0|pin@5||8.75|1.5|pin@7||-2|1.5
Awire|net@0|||2700|res@0|b|8.75|-2.5|pin@5||8.75|1.5
Awire|net@2|||900|res@0|a|8.75|-6.5|gnd@2||8.75|-11
Awire|net@33|||900|O1|b|-2|1.75|pin@7||-2|1.5
Awire|net@34|||2700|gnd@1||-0.25|-7|pin@10||-0.25|-6.25
Awire|net@35|||0|pin@10||-0.25|-6.25|O1|gndR|-3|-6.25
Awire|net@36|||0|O1|gndL|-19|-6.25|pin@11||-23|-6.25
Awire|net@37|||900|pin@11||-23|-6.25|gnd@0||-23|-7
X

# Cell ID_VGS_NMOS;1{sch}
CID_VGS_NMOS;1{sch}||schematic|1268103216291|1269305937986|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||5.5|-4.25||||
N4-Port-Transistor|nmos-4@0||3.5|2|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;Y-2.5;)SNMOS
NWire_Pin|pin@0||5.5|6.25||||
NWire_Pin|pin@2||7.5|1||||
NWire_Pin|pin@3||0|2||||
Ngeneric:Invisible-Pin|pin@4||-1.25|7.5|||||SIM_spice_card(D5G1;)S[VD VD 0 DC 5,VG VG 0 DC 0,VB VB 0 DC 0,.include C5_models.txt,.dc VG 0 2 1m VB 0 2 1]
Awire|VB|D5G1;||1800|nmos-4@0|b|5.5|1|pin@2||7.5|1
Awire|VD|D5G1;||2700|nmos-4@0|d|5.5|4|pin@0||5.5|6.25
Awire|VG|D5G1;||0|nmos-4@0|g|2.5|2|pin@3||0|2
Awire|net@4|||900|nmos-4@0|s|5.5|0|gnd@0||5.5|-2.25
X

# Cell MOS_multiplying;1{lay}
CMOS_multiplying;1{lay}||mocmos|1266461847239|1269305938067||DRC_last_good_drc_area_date()G1267238147481|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1267238147481
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-N-Active-Con|contact@0||23.75|4.75|5||RRR|
NMetal-1-N-Active-Con|contact@1||13.75|4.75|5||RRR|
NMetal-1-N-Active-Con|contact@2||34.75|4.75|5||RRR|
NMetal-1-N-Active-Con|contact@3||3.75|4.75|5||RRR|
NMetal-1-N-Active-Con|contact@4||-6.25|4.75|5||RRR|
NN-Transistor|nmos@0||28.5|4.75|7||RRR|
NN-Transistor|nmos@1||19.25|4.75|7||RRR|
NN-Transistor|nmos@2||8.5|4.75|7||RRR|
NN-Transistor|nmos@3||-0.75|4.75|7||RRR|
NPolysilicon-1-Pin|pin@0||28.5|15.5|||RRR|
NPolysilicon-1-Pin|pin@2||19.25|15.5|||RRR|
NN-Active-Pin|pin@3||23.75|4.75|||RRR|
NMetal-1-Pin|pin@4||34.75|-9.75|||RRR|
NMetal-1-Pin|pin@6||13.75|-9.75|||RRR|
NPolysilicon-1-Pin|pin@7||8.5|15.5|||RRR|
NPolysilicon-1-Pin|pin@8||-0.75|15.5|||RRR|
NN-Active-Pin|pin@9||3.75|4.75|||RRR|
NMetal-1-Pin|pin@11||-6.25|-9.75|||RRR|
NMetal-1-Pin|pin@12||23.75|20.5|||RR|
NMetal-1-Pin|pin@14||3.75|20.5|||RR|
AN-Active|net@0|||S1800|nmos@1|diff-top|23.25|4.5|nmos@0|diff-bottom|24.5|4.5
APolysilicon-1|net@1|||S2700|nmos@0|poly-left|28.5|11.75|pin@0||28.5|15.5
APolysilicon-1|net@4|||S2700|nmos@1|poly-left|19.25|11.75|pin@2||19.25|15.5
AN-Active|net@5|||S1800|nmos@1|diff-top|23.25|4.75|pin@3||23.75|4.75
AN-Active|net@6||2|S2700|contact@0||23.75|4.25|pin@3||23.75|4.75
AN-Active|net@7|||S1800|contact@1||13.75|3.75|nmos@1|diff-bottom|15.5|3.75
AN-Active|net@8|||S0|contact@2||34.75|4.75|nmos@0|diff-top|32.25|4.75
AMetal-1|net@9||1|S900|contact@2||34.75|4.75|pin@4||34.75|-9.75
AMetal-1|net@12||1|S900|contact@1||13.75|4.75|pin@6||13.75|-9.75
AN-Active|net@13|||S1800|nmos@3|diff-top|3.25|4.5|nmos@2|diff-bottom|4.5|4.5
APolysilicon-1|net@14|||S2700|nmos@2|poly-left|8.5|11.75|pin@7||8.5|15.5
AMetal-1|net@15||1|S900|contact@4||-6.25|4.75|pin@11||-6.25|-9.75
APolysilicon-1|net@16|||S2700|nmos@3|poly-left|-0.75|11.75|pin@8||-0.75|15.5
AN-Active|net@17|||S1800|nmos@3|diff-top|3.25|4.75|pin@9||3.75|4.75
AN-Active|net@18||2|S2700|contact@3||3.75|4.25|pin@9||3.75|4.75
AN-Active|net@19|||S1800|contact@4||-6.25|3.75|nmos@3|diff-bottom|-4.5|3.75
AN-Active|net@22|||S1800|nmos@2|diff-top|12|5.5|contact@1||13.75|5.5
APolysilicon-1|net@23|||S0|pin@7||8.5|15.5|pin@8||-0.75|15.5
APolysilicon-1|net@24|||S1800|pin@7||8.5|15.5|pin@2||19.25|15.5
AMetal-1|net@25||1|S2700|contact@0||23.75|4.75|pin@12||23.75|20.5
AMetal-1|net@28||1|S2700|contact@3||3.75|4.75|pin@14||3.75|20.5
AMetal-1|net@29||1|S1800|pin@11||-6.25|-9.75|pin@6||13.75|-9.75
APolysilicon-1|net@30|||S0|pin@0||28.5|15.5|pin@2||19.25|15.5
AMetal-1|net@31||1|S0|pin@4||34.75|-9.75|pin@6||13.75|-9.75
AMetal-1|net@32||1|S0|pin@12||23.75|20.5|pin@14||3.75|20.5
X

# Cell MOS_multiplying;1{sch}
CMOS_multiplying;1{sch}||schematic|1266461743177|1266461803022|
Ngeneric:Facet-Center|art@0||0|0||||AV
NTransistor|nmos@0||2.75|3|||R||ATTR_M(D5G1;NX-1.5;Y-1;)S2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0
X

# Cell NOR_3;1{sch}
CNOR_3;1{sch}||schematic|1271898454280|1271899148493|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-7|19||||
NOff-Page|conn@1||-7|14.5||||
NOff-Page|conn@2||-7|10||||
NOff-Page|conn@3||20.5|7.25||||
NGround|gnd@0||0.25|0.25|-1.5|-2||
NGround|gnd@1||8|0.25|-1.5|-2||
NGround|gnd@2||16.25|0.25|-1.5|-2||
NTransistor|nmos@0||-1.75|4.5|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X-0.5;Y-3.5;)SNMOS
NTransistor|nmos@1||-1.75|14.5|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NTransistor|nmos@2||6|4.5|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X-0.5;Y-3.5;)SNMOS
NTransistor|nmos@3||14.25|4.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X-0.5;Y-3.5;)SNMOS
Ngeneric:Invisible-Pin|pin@2||15.25|23.75|||||SIM_spice_card(D5G1;)S[vA A 0 DC 0 pulse 0 5 2n 100p 100p 5n 10n,vB B 0 DC 0 pulse 0 5 2n 100p 100p 5n 10n,vC C 0 DC 0 pulse 0 5 2n 100p 100p 5n 10n,vdd vdd 0 dc 5,cl out 0 100f,.include C5_models.txt,.tran 0 20n]
NWire_Pin|pin@3||8|7.25||||
NWire_Pin|pin@4||0.25|7.25||||
NWire_Pin|pin@5||16.25|7.25||||
NWire_Pin|pin@9||13.25|19||||
NWire_Pin|pin@11||5|14.5||||
NTransistor|pmos@0||-1.75|19|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NTransistor|pmos@2||-1.75|10|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NPower|pwr@0||0.25|23.5||||
Awire|net@3|||900|pwr@0||0.25|23.5|pmos@0|d|0.25|21
Awire|net@5|||900|pmos@0|s|0.25|17|nmos@1|d|0.25|16.5
Awire|net@6|||900|nmos@1|s|0.25|12.5|pmos@2|d|0.25|12
Awire|net@8|||2700|nmos@2|d|8|6.5|pin@3||8|7.25
Awire|net@9|||2700|nmos@0|d|0.25|6.5|pin@4||0.25|7.25
Awire|net@10|||2700|pin@4||0.25|7.25|pmos@2|s|0.25|8
Awire|net@11|||0|pin@3||8|7.25|pin@4||0.25|7.25
Awire|net@12|||1800|pin@3||8|7.25|pin@5||16.25|7.25
Awire|net@15|||900|pin@5||16.25|7.25|nmos@3|d|16.25|6.25
Awire|net@16|||900|nmos@3|s|16.25|2.25|gnd@2||16.25|1.25
Awire|net@17|||900|nmos@2|s|8|2.5|gnd@1||8|1.25
Awire|net@18|||900|nmos@0|s|0.25|2.5|gnd@0||0.25|1.25
Awire|net@21|||0|nmos@1|g|-2.75|14.5|conn@1|y|-5|14.5
Awire|net@22|||1800|conn@0|y|-5|19|pmos@0|g|-2.75|19
Awire|net@27|||2700|nmos@2|g|5|4.5|pin@11||5|14.5
Awire|net@28|||0|pin@11||5|14.5|nmos@1|g|-2.75|14.5
Awire|net@29|||2700|nmos@0|g|-2.75|4.5|pmos@2|g|-2.75|10
Awire|net@30|||0|pmos@2|g|-2.75|10|conn@2|y|-5|10
Awire|net@31|||2700|nmos@3|g|13.25|4.25|pin@9||13.25|19
Awire|net@32|||0|pin@9||13.25|19|pmos@0|g|-2.75|19
Awire|net@33|||0|conn@3|a|18.5|7.25|pin@5||16.25|7.25
EA||D5G2;|conn@0|a|U
EB||D5G2;|conn@1|a|U
EC||D5G2;|conn@2|a|U
Eout||D5G2;|conn@3|y|U
X

# Cell RC;1{sch}
CRC;1{sch}||schematic|1272329282413|1272329309679|
Ngeneric:Facet-Center|art@0||0|0||||AV
Icap_100f;1{sch}|cap_100f@0||5|2.25|||D5G4;
NResistor|p2res@0||-0.75|6.75||||9|ATTR_length(D5G0.25;X-1.5;)S2|ATTR_width(D5G0.5;X1.5;)S2|SCHEM_resistance(D5G1;)S100
NWire_Pin|pin@0||5|6.75||||
NWire_Pin|pin@2||-3|0.25||||
Awire|net@0|||2700|cap_100f@0|p2|5|5.25|pin@0||5|6.75
Awire|net@3|||0|pin@0||5|6.75|p2res@0|b|1.25|6.75
Awire|net@4|||0|cap_100f@0|p1|5|0.25|pin@2||-3|0.25
X

# Cell R_8k_nw;1{lay}
CR_8k_nw;1{lay}||mocmos|1264470638170|1264643405078||DRC_last_good_drc_area_date()G1264471956928|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264643629266
Ngeneric:Facet-Center|art@0||0|0||||AV
NN-Well-Node|plnode@0||0|0|120|12||A
X

# Cell R_poly_1k;1{lay}
CR_poly_1k;1{lay}||mocmos|1265854336178|1265855267464|
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Pin|pin@7||-29|-7.5||||
NMetal-1-Pin|pin@8||21|18.25||||
NN-No-Silicide-Poly-Resistor|resnnspoly@0||-12.5|24||||
NN-Poly-Resistor|resnpoly@0||-4|3.5|||||SCHEM_resistance(D5G1;)S200
AMetal-1|net@7|||S900|resnpoly@0|left|-29|3.5|pin@7||-29|-7.5
AMetal-1|net@8|||S2700|resnpoly@0|right|21|3.5|pin@8||21|18.25
X

# Cell R_temp;1{sch}
CR_temp;1{sch}||schematic|1266891234484|1266891497292|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||10.5|1.75||||
Ngeneric:Invisible-Pin|pin@0||-0.5|4.75|||||SIM_spice_card(D5G1;)S[Vin vin 0 DC 4,.dc Vin 0 1 1m temp 0 100 25]
NWire_Pin|pin@1||10.5|10.75||||
NWire_Pin|pin@2||2.5|10.75||||
NResistor|resnwell@0||7.5|10.75||||3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;Y1.5;)S8k TC1=0.002
NResistor|resnwell@1||10.5|6.75|||R|3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k  TC1=0.002
Awire|net@0|||900|pin@1||10.5|10.75|resnwell@1|b|10.5|8.75
Awire|net@1|||2700|gnd@0||10.5|3.75|resnwell@1|a|10.5|4.75
Awire|vin|D5G1;||0|resnwell@0|a|5.5|10.75|pin@2||2.5|10.75
Awire|vout|D5G1;||1800|resnwell@0|b|9.5|10.75|pin@1||10.5|10.75
X

# Cell R_voltage;1{sch}
CR_voltage;1{sch}||schematic|1266891234484|1266892066415|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||10.5|1.75||||
Ngeneric:Invisible-Pin|pin@0||2.5|6|||||SIM_spice_card(D5G1;)S[Vin vin 0 DC 4,.model rmod R vcr1=0.002,.dc Vin 0 1 1m]
NWire_Pin|pin@1||10.5|10.75||||
NWire_Pin|pin@2||2.5|10.75||||
NResistor|resnwell@0||7.5|10.75||||3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;Y1.5;)S8k rmod
NResistor|resnwell@1||10.5|6.75|||R|3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k  rmod
Awire|net@0|||900|pin@1||10.5|10.75|resnwell@1|b|10.5|8.75
Awire|net@1|||2700|gnd@0||10.5|3.75|resnwell@1|a|10.5|4.75
Awire|vin|D5G1;||0|resnwell@0|a|5.5|10.75|pin@2||2.5|10.75
Awire|vout|D5G1;||1800|resnwell@0|b|9.5|10.75|pin@1||10.5|10.75
X

# Cell TRC;2{ic}
CTRC;2{ic}||artwork|1181325801208|1236119972671|E|ATTR_SPICE_template(D5G1;NTX-2;Y7.5;)S$(node_name) $(a)  $(gndL) $(b)  $(gndR) TRC
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Polygon|art@1||0|3|18|6|||trace()V[-9/0,-7.75/-3,-7.75/-3,-6/3,-4/-3,-2/3,0/-3,2/3,4/-3,6/3,8/-3,9/0]
NPin|pin@0||-1.5|-3.75|1|1||
NPin|pin@1||1.5|-3.75|1|1||
Nschematic:Wire_Pin|pin@2||-9|3||||
Nschematic:Wire_Pin|pin@3||9|3||||
Nschematic:Wire_Pin|pin@4||-8|-5||||
Nschematic:Wire_Pin|pin@5||8|-5||||
NPin|pin@8||-8.5|0|1|1||
NPin|pin@9||8.5|0|1|1||
NPin|pin@10||0|-2.5|1|1||
NPin|pin@11||0|0|1|1||
NPin|pin@12||-1.5|-2.5|1|1||
NPin|pin@13||1.5|-2.5|1|1||
NPin|pin@14||-1.5|-6.75|1|1||
NPin|pin@15||0|-8.5|1|1||
NPin|pin@16||1.5|-6.75|1|1||
NPin|pin@17||0|-6.75|1|1||
NPin|pin@18||0|-3.75|1|1||
NPin|pin@19||0|-5|1|1||
NPin|pin@20||-8|-5|1|1||
NPin|pin@21||8|-5|1|1||
AThicker|net@0|||FS1800|pin@11||0|0|pin@9||8.5|0
AThicker|net@1|||FS1800|pin@8||-8.5|0|pin@11||0|0
AThicker|net@2|||FS2700|pin@10||0|-2.5|pin@11||0|0
ASolid|net@3|||FS1800|pin@12||-1.5|-2.5|pin@13||1.5|-2.5
ASolid|net@4|||FS1800|pin@18||0|-3.75|pin@1||1.5|-3.75
AThicker|net@7|||FS1306|pin@14||-1.5|-6.75|pin@15||0|-8.5
AThicker|net@8|||FS2294|pin@15||0|-8.5|pin@16||1.5|-6.75
AThicker|net@10|||FS1800|pin@17||0|-6.75|pin@16||1.5|-6.75
AThicker|net@11|||FS1800|pin@14||-1.5|-6.75|pin@17||0|-6.75
ASolid|net@12|||FS1800|pin@0||-1.5|-3.75|pin@18||0|-3.75
AThicker|net@13|||FS2700|pin@17||0|-6.75|pin@19||0|-5
AThicker|net@14|||FS2700|pin@19||0|-5|pin@18||0|-3.75
AThicker|net@15|||FS0|pin@19||0|-5|pin@20||-8|-5
AThicker|net@16|||FS1800|pin@19||0|-5|pin@21||8|-5
Ea||D5G2;|pin@2||U
Eb||D5G2;|pin@3||U
EgndL||D5G2;|pin@4||U
EgndR||D5G2;|pin@5||U
X

# Cell _ring_osc;1{sch}
C_ring_osc;1{sch}||schematic|1270515253106|1270515253106|
Ngeneric:Facet-Center|art@0||0|0||||AV
X

# Cell active;1{lay}
Cactive;1{lay}||mocmos|1265681773010|1265682311329|
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Pin|pin@0||-55|0||||
NMetal-1-Pin|pin@1||-55|23||||
NMetal-1-Pin|pin@2||-42.5|23||||
NMetal-1-Pin|pin@3||-42.5|34||||
NMetal-1-Pin|pin@4||-62|34||||
NMetal-1-Pin|pin@5||15|-20.5||||
NMetal-1-P-Well-Con|substr@0||0|0||||
NMetal-1-N-Well-Con|well@0||3|-20.5||||
AMetal-1|net@0|||S0|substr@0||0|0|pin@0||-55|0
AMetal-1|net@1|||S2700|pin@0||-55|0|pin@1||-55|23
AMetal-1|net@2|||S1800|pin@1||-55|23|pin@2||-42.5|23
AMetal-1|net@3|||S2700|pin@2||-42.5|23|pin@3||-42.5|34
AMetal-1|net@4|||S0|pin@3||-42.5|34|pin@4||-62|34
AMetal-1|net@5|||S1800|well@0||3|-20.5|pin@5||15|-20.5
X

# Cell cap_100f;1{lay}
Ccap_100f;1{lay}||mocmos|1263140142218|1272329846035||DRC_last_good_drc_area_date()G1272329233933|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1272329233933
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Polysilicon-1-Con|contact@0||0|0|20|||
NMetal-1-Polysilicon-2-Con|contact@1||0.5|16|10|10||
NPolysilicon-1-Pin|pin@0||0|29||||
Ngeneric:Invisible-Pin|pin@1||0.5|7|||||SIM_spice_card(D5G1;)S[Cp1p2 p1 p2 100f,Cp1sub p1 0 10f]
APolysilicon-1|net@0||23|IJS2700|contact@0||0|0|pin@0||0|29
Ep1||D5G5;|contact@0||U
Ep2||D5G5;|contact@1||U
X

# Cell cap_100f;1{sch}
Ccap_100f;1{sch}||schematic|1263140338125|1272329834630|
Ngeneric:Facet-Center|art@0||0|0||||AV
Nartwork:Opened-Thicker-Polygon|art@2||0|0|2||||trace()V[-1/0,1/0]
Nartwork:Opened-Polygon|art@3||0|-1||2|||trace()V[0/-1,0/1]
Nartwork:Opened-Polygon|art@4||0|2|2|2|||trace()V[-1/-1,1/-1,0/-1,0/1]
NWire_Pin|pin@0||0|-2||||
NWire_Pin|pin@1||0|3||||
Ngeneric:Invisible-Pin|pin@2||0|0.5|||||SIM_spice_card(D5G0.5;)S[Cp1p2 p1 p2 100f,Cp1sub p1 0 10f]
Ep1||D5G2;|pin@0||U
Ep2||D5G2;|pin@1||U
X

# Cell delay_ex;6{sch}
Cdelay_ex;6{sch}||schematic|1269305867525|1269306307963|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S1p
NGround|gnd@0||9.5|5|-1.5|-2||
NGround|gnd@1||15|5.25|-1.5|-2||
NTransistor|nmos@0||7.5|9.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@0||2.75|9.25||||
NWire_Pin|pin@1||15|13||||
NWire_Pin|pin@2||9.5|13||||
Ngeneric:Invisible-Pin|pin@4||1.25|13.5|||||SIM_spice_card(D5G1;)S[.ic v(out)=5,Vin in 0 DC 0 PULSE 0 5 5n 100p,.include C5_models.txt,.tran 10p 20n]
Awire|in|D5G1;||0|nmos@0|g|6.5|9.25|pin@0||2.75|9.25
Awire|net@0|||2700|gnd@0||9.5|6|nmos@0|s|9.5|7.25
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|13
Awire|net@6|||900|pin@2||9.5|13|nmos@0|d|9.5|11.25
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|out|D5G1;||0|pin@1||15|13|pin@2||9.5|13
X

# Cell delay_ex;5{sch}
Cdelay_ex;5{sch}||schematic|1269305867525|1269479801398|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S1p
NGround|gnd@1||15|5.25|-1.5|-2||
NGround|gnd@2||1.75|11|-1.5|-2||
NWire_Pin|pin@1||15|13||||
Ngeneric:Invisible-Pin|pin@4||6|6.5|||||SIM_spice_card(D5G1;)S[.ic v(out)=5,VDD VDD 0 DC 5,Vin in 0 DC 0 PULSE 5 0 5n 100p,.include C5_models.txt,.tran 10p 50n]
NWire_Pin|pin@5||1.75|13||||
NWire_Pin|pin@6||7.5|17.5||||
NTransistor|pmos@0||7.5|15||||2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X2.25;Y-2.5;)SPMOS
NPower|pwr@0||-0.25|16||||
Awire|in|D5G1;||2700|pmos@0|g|7.5|16|pin@6||7.5|17.5
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|13
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|net@9|||0|pmos@0|s|5.5|13|pin@5||1.75|13
Awire|net@10|||2700|gnd@2||1.75|12|pin@5||1.75|13
Awire|out|D5G1;||1800|pmos@0|d|9.5|13|pin@1||15|13
X

# Cell delay_ex;4{sch}
Cdelay_ex;4{sch}||schematic|1269305867525|1269308194967|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S1p
NGround|gnd@1||15|5.25|-1.5|-2||
NTransistor|nmos@0||7.5|17.25|||||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@1||15|15.25||||
Ngeneric:Invisible-Pin|pin@4||5.25|8.75|||||SIM_spice_card(D5G1;)S[.ic v(out)=0,Vin in 0 DC 0 PULSE 0 5 5n 100p,VDD VDD 0 DC 5,.include C5_models.txt,.tran 10p 20n]
NWire_Pin|pin@6||7.5|19.5||||
NWire_Pin|pin@7||1.25|19.5||||
NPower|pwr@0||2.25|15.25||||
Awire|in|D5G1;||0|pin@6||7.5|19.5|pin@7||1.25|19.5
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|15.25
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|net@12|||0|nmos@0|s|5.5|15.25|pwr@0||2.25|15.25
Awire|net@13|||2700|nmos@0|g|7.5|18.25|pin@6||7.5|19.5
Awire|out|D5G1;||1800|nmos@0|d|9.5|15.25|pin@1||15|15.25
X

# Cell delay_ex;3{sch}
Cdelay_ex;3{sch}||schematic|1269305867525|1269307785633|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S1p
NGround|gnd@1||15|5.25|-1.5|-2||
NTransistor|nmos@0||7.5|9.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@1||15|13||||
NWire_Pin|pin@2||9.5|13||||
Ngeneric:Invisible-Pin|pin@4||1.25|13.5|||||SIM_spice_card(D5G1;)S[VDD VDD 0 DC 5,.include C5_models.txt,.tran 10m 1]
NWire_Pin|pin@5||4.75|9.25||||
NWire_Pin|pin@6||4.75|5.25||||
NWire_Pin|pin@8||9.5|5.25||||
Awire|VDD|D5G1;||1800|pin@6||4.75|5.25|pin@8||9.5|5.25
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|13
Awire|net@6|||900|pin@2||9.5|13|nmos@0|d|9.5|11.25
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|net@8|||0|nmos@0|g|6.5|9.25|pin@5||4.75|9.25
Awire|net@9|||900|pin@5||4.75|9.25|pin@6||4.75|5.25
Awire|net@12|||900|nmos@0|s|9.5|7.25|pin@8||9.5|5.25
Awire|out|D5G1;||0|pin@1||15|13|pin@2||9.5|13
X

# Cell delay_ex;2{sch}
Cdelay_ex;2{sch}||schematic|1269305867525|1269307568203|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S1p
NGround|gnd@1||15|5.25|-1.5|-2||
NTransistor|nmos@0||7.5|9.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@1||15|13||||
NWire_Pin|pin@2||9.5|13||||
Ngeneric:Invisible-Pin|pin@4||1.25|13.5|||||SIM_spice_card(D5G1;)S[.ic v(out)=5,Vin in 0 DC 0 PULSE  5 0 5n 100p,VDD VDD 0 DC 5,.include C5_models.txt,.tran 10p 20n]
NWire_Pin|pin@5||4|9.25||||
NWire_Pin|pin@7||9.5|5.25||||
Awire|VDD|D5G1;||1800|pin@5||4|9.25|nmos@0|g|6.5|9.25
Awire|in|D5G1;||900|nmos@0|s|9.5|7.25|pin@7||9.5|5.25
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|13
Awire|net@6|||900|pin@2||9.5|13|nmos@0|d|9.5|11.25
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|out|D5G1;||0|pin@1||15|13|pin@2||9.5|13
X

# Cell delay_ex;1{sch}
Cdelay_ex;1{sch}||schematic|1269305867525|1269306898811|
Ngeneric:Facet-Center|art@0||0|0||||AV
NCapacitor|cap@0||15|10|||||SCHEM_capacitance(D5G1;X2.25;)S4.5f
NGround|gnd@0||9.5|5|-1.5|-2||
NGround|gnd@1||15|5.25|-1.5|-2||
NTransistor|nmos@0||7.5|9.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@0||2.75|9.25||||
NWire_Pin|pin@1||15|13||||
NWire_Pin|pin@2||9.5|13||||
Ngeneric:Invisible-Pin|pin@4||1.25|13.5|||||SIM_spice_card(D5G1;)S[.ic v(out)=5,Vin in 0 DC 0 PULSE 0 5 5p .1p,.include C5_models.txt,.tran .1p 100p]
Awire|in|D5G1;||0|nmos@0|g|6.5|9.25|pin@0||2.75|9.25
Awire|net@0|||2700|gnd@0||9.5|6|nmos@0|s|9.5|7.25
Awire|net@2|||2700|cap@0|a|15|12|pin@1||15|13
Awire|net@6|||900|pin@2||9.5|13|nmos@0|d|9.5|11.25
Awire|net@7|||2700|gnd@1||15|6.25|cap@0|b|15|8
Awire|out|D5G1;||0|pin@1||15|13|pin@2||9.5|13
X

# Cell diode_rd_example;1{sch}
Cdiode_rd_example;1{sch}||schematic|1181931511312|1265076532161|
Ngeneric:Facet-Center|art@0||0|0||||AV
NDiode|diode|D5G1;X-2.75;Y1;|-0.25|-2.5|||RR||SCHEM_diode(D5G1;Y-0.25;)S""
NGround|gnd@0||-0.25|-9.25||||
Ngeneric:Invisible-Pin|pin@0||-15.5|-1.75|||||SIM_spice_card(D5G0.75;)S[Vin Vin 0 DC 10.7 AC 1m,.model diode D,.ac dec 100 1 100]
NWire_Pin|pin@1||-0.25|2.75||||
NWire_Pin|pin@2||-21.25|2.75||||
Ngeneric:Invisible-Pin|pin@3||-11.25|7.75|||||ART_message(D5G1;)SPlot Vin,VD and ID
NResistor|res@0||-11.25|2.75|||||SCHEM_resistance(D5G2;Y1.5;)S1k
Awire|D1|D5G1;X2.25;Y-3.25;||900|pin@1||-0.25|2.75|diode|b|-0.25|-0.5
Awire|VD|D5G2;X2;Y1;||1800|res@0|b|-9.25|2.75|pin@1||-0.25|2.75
Awire|Vin|D5G2;X-5.5;Y1;||0|res@0|a|-13.25|2.75|pin@2||-21.25|2.75
Awire|net@0|||2700|gnd@0||-0.25|-7.25|diode|a|-0.25|-4.5
X

# Cell inv;1{lay}
Cinv;1{lay}||mocmos|1265853976775|1266458829098||DRC_last_good_drc_area_date()G1265854160393|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265854160393
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-N-Active-Con|contact@0||-11.5|2.5||||
NMetal-1-P-Active-Con|contact@1||9.5|3||||
NMetal-1-Polysilicon-1-Con|contact@2||-0.5|13.5||||
NN-Transistor|nmos@0||-17|2.5|||R|
NHi-Res-Poly2-Resistor|p2res@0||0.5|30.25||||
NPolysilicon-1-Pin|pin@0||-17|16.5||||
NPolysilicon-1-Pin|pin@1||19|16.5||||
NMetal-1-Pin|pin@2||9.5|2.5||||
NPolysilicon-1-Pin|pin@4||-0.5|16.5||||
NP-Transistor|pmos@0||19|3|||R|
NP-No-Silicide-Poly-Resistor|respnspoly@0||53.75|-36.5||||
NP-Poly-Resistor|resppoly@0||49.75|-20.25||||
APolysilicon-1|net@0|||S2700|nmos@0|poly-right|-17|6|pin@0||-17|16.5
APolysilicon-1|net@4|||S900|pin@1||19|16.5|pmos@0|poly-right|19|6.5
AN-Active|net@5|||S0|contact@0||-11|2.5|nmos@0|diff-bottom|-13.25|2.5
AP-Active|net@6|||S1800|contact@1||9.5|3|pmos@0|diff-top|15.25|3
AMetal-1|net@7||1|S900|contact@1||9.5|3|pin@2||9.5|2.5
AMetal-1|net@8||1|S1800|contact@0||-11.5|2.5|pin@2||9.5|2.5
APolysilicon-1|net@9|||S1800|pin@0||-17|16.5|pin@4||-0.5|16.5
APolysilicon-1|net@10|||S1800|pin@4||-0.5|16.5|pin@1||19|16.5
APolysilicon-1|net@11|||S2700|contact@2||-0.5|13|pin@4||-0.5|16.5
X

# Cell inv_20_10;1{ic}
Cinv_20_10;1{ic}||artwork|1270689426513|1270689637549|E
Ngeneric:Facet-Center|art@0||0|0||||AV
NTriangle|art@3||0.75|0|6|6|RRR|
NCircle|art@4||4.25|0|1|1||
Nschematic:Bus_Pin|pin@0||-4.25|0||||
Nschematic:Wire_Pin|pin@1||-2.25|0||||
Nschematic:Bus_Pin|pin@2||6.75|0|||RR|
Nschematic:Wire_Pin|pin@3||4.75|0|||RR|
Ngeneric:Invisible-Pin|pin@4||0|0|||||ART_message(D5G1;)S20/10
Aschematic:wire|net@0|||0|pin@1||-2.25|0|pin@0||-4.25|0
Aschematic:wire|net@1|||1800|pin@3||4.75|0|pin@2||6.75|0
Ea||D5G2;|pin@0||U
Ea_b||D5G2;|pin@2||U
X

# Cell inv_20_10;1{sch}
Cinv_20_10;1{sch}||schematic|1269479742999|1270689507274|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-5.5|9||||
NOff-Page|conn@1||7|9||||
NGround|gnd@0||3.5|1|-1.5|-2||
Iinv_20_10;1{ic}|inv_20_1@0||13|16.75|||D5G4;
NTransistor|nmos@0||1.5|5.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@2||-1|12.75||||
NWire_Pin|pin@3||-1|5.25||||
NWire_Pin|pin@8||-1|9||||
NWire_Pin|pin@9||3.5|9||||
NTransistor|pmos@0||1.5|12.75|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D20.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NPower|pwr@0||3.5|17.5||||
Awire|net@0|||2700|gnd@0||3.5|2|nmos@0|s|3.5|3.25
Awire|net@3|||0|pmos@0|g|0.5|12.75|pin@2||-1|12.75
Awire|net@5|||1800|pin@3||-1|5.25|nmos@0|g|0.5|5.25
Awire|net@6|||900|pwr@0||3.5|17.5|pmos@0|d|3.5|14.75
Awire|net@19|||900|pin@2||-1|12.75|pin@8||-1|9
Awire|net@20|||900|pin@8||-1|9|pin@3||-1|5.25
Awire|net@21|||1800|conn@0|y|-3.5|9|pin@8||-1|9
Awire|net@22|||2700|nmos@0|d|3.5|7.25|pin@9||3.5|9
Awire|net@23|||2700|pin@9||3.5|9|pmos@0|s|3.5|10.75
Awire|net@24|||0|conn@1|a|5|9|pin@9||3.5|9
Ea||D5G2;|conn@0|a|U
Ea_b||D5G2;|conn@1|y|U
X

# Cell inv_160_80;1{ic}
Cinv_160_80;1{ic}||artwork|1270689426513|1270689870074|E
Ngeneric:Facet-Center|art@0||0|0||||AV
NTriangle|art@3||0.75|0|6|6|RRR|
NCircle|art@4||4.25|0|1|1||
Nschematic:Bus_Pin|pin@0||-4.25|0||||
Nschematic:Wire_Pin|pin@1||-2.25|0||||
Nschematic:Bus_Pin|pin@2||6.75|0|||RR|
Nschematic:Wire_Pin|pin@3||4.75|0|||RR|
Ngeneric:Invisible-Pin|pin@4||0|0|||||ART_message(D5G1;)S160/80
Aschematic:wire|net@0|||0|pin@1||-2.25|0|pin@0||-4.25|0
Aschematic:wire|net@1|||1800|pin@3||4.75|0|pin@2||6.75|0
Ea||D5G2;|pin@0||U
Ea_b||D5G2;|pin@2||U
X

# Cell inv_160_80;1{sch}
Cinv_160_80;1{sch}||schematic|1269479742999|1270689855682|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-5.5|9||||
NOff-Page|conn@1||7|9||||
NGround|gnd@0||3.5|1|-1.5|-2||
Iinv_160_80;1{ic}|inv_160_@0||13|16.75|||D5G4;
NTransistor|nmos@0||1.5|5.25|||R||ATTR_M(D5G1;NX-1.5;Y-2.75;)S8|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@2||-1|12.75||||
NWire_Pin|pin@3||-1|5.25||||
NWire_Pin|pin@8||-1|9||||
NWire_Pin|pin@9||3.5|9||||
NTransistor|pmos@0||1.5|12.75|||R|2|ATTR_M(D5G1;NX-1.25;Y-2.75;)S8|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D20.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NPower|pwr@0||3.5|17.5||||
Awire|net@0|||2700|gnd@0||3.5|2|nmos@0|s|3.5|3.25
Awire|net@3|||0|pmos@0|g|0.5|12.75|pin@2||-1|12.75
Awire|net@5|||1800|pin@3||-1|5.25|nmos@0|g|0.5|5.25
Awire|net@6|||900|pwr@0||3.5|17.5|pmos@0|d|3.5|14.75
Awire|net@19|||900|pin@2||-1|12.75|pin@8||-1|9
Awire|net@20|||900|pin@8||-1|9|pin@3||-1|5.25
Awire|net@21|||1800|conn@0|y|-3.5|9|pin@8||-1|9
Awire|net@22|||2700|nmos@0|d|3.5|7.25|pin@9||3.5|9
Awire|net@23|||2700|pin@9||3.5|9|pmos@0|s|3.5|10.75
Awire|net@24|||0|conn@1|a|5|9|pin@9||3.5|9
Ea||D5G2;|conn@0|a|U
Ea_b||D5G2;|conn@1|y|U
X

# Cell inv_sim;5{sch}
Cinv_sim;5{sch}||schematic|1269479742999|1270691773303|
Ngeneric:Facet-Center|art@0||0|0||||AV
Iinv_20_10;1{ic}|in2[0:7]|D5G1;Y2.75;|16.75|3.5|||D5G4;
Iinv_20_10;1{ic}|in3[0:63]|D5G1;Y2.75;|29.25|3.5|||D5G4;
Iinv_20_10;1{ic}|inv4[0:511]|D5G1;Y3;|42.75|3.5|||D5G4;
Iinv_20_10;1{ic}|inv_20_1@0||4.75|3.5|||D5G4;
Ngeneric:Invisible-Pin|pin@1||5|-3.25|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 0 pulse 0 5 25n 1n 1n 50n 100n,vdd vdd 0 dc 5,Cl out 0 30p,.include C5_models.txt,.tran 0 200n]
NWire_Pin|pin@8||-3.25|3.5||||
NWire_Pin|pin@12||51.5|3.5||||
Awire|net@0|||0|in2[0:7]|a|12.5|3.5|inv_20_1@0|a_b|11.5|3.5
Awire|net@4|||0|in3[0:63]|a|25|3.5|in2[0:7]|a_b|23.5|3.5
Awire|net@6|||0|inv4[0:511]|a|38.5|3.5|in3[0:63]|a_b|36|3.5
Awire|out|D5G1;||1800|inv4[0:511]|a_b|49.5|3.5|pin@12||51.5|3.5
Awire|vin|D5G1;||0|inv_20_1@0|a|0.5|3.5|pin@8||-3.25|3.5
X

# Cell inv_sim;4{sch}
Cinv_sim;4{sch}||schematic|1269479742999|1270691668852|
Ngeneric:Facet-Center|art@0||0|0||||AV
Iinv_20_10;1{ic}|in2[0:7]|D5G1;Y2.75;|16.75|3.5|||D5G4;
Iinv_20_10;1{ic}|in3[0:63]|D5G1;Y2.75;|29.25|3.5|||D5G4;
Iinv_20_10;1{ic}|inv_20_1@0||4.75|3.5|||D5G4;
Ngeneric:Invisible-Pin|pin@1||5|-3.25|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 0 pulse 0 5 25n 1n 1n 50n 100n,vdd vdd 0 dc 5,Cl out 0 30p,.include C5_models.txt,.tran 0 200n]
NWire_Pin|pin@8||-3.25|3.5||||
NWire_Pin|pin@11||38.25|3.5||||
Awire|net@0|||0|in2[0:7]|a|12.5|3.5|inv_20_1@0|a_b|11.5|3.5
Awire|net@4|||0|in3[0:63]|a|25|3.5|in2[0:7]|a_b|23.5|3.5
Awire|out|D5G1;||1800|in3[0:63]|a_b|36|3.5|pin@11||38.25|3.5
Awire|vin|D5G1;||0|inv_20_1@0|a|0.5|3.5|pin@8||-3.25|3.5
X

# Cell inv_sim;3{sch}
Cinv_sim;3{sch}||schematic|1269479742999|1270689948821|
Ngeneric:Facet-Center|art@0||0|0||||AV
Iinv_20_10;1{ic}|inv_20_1@0||4.75|3.5|||D5G4;
Iinv_20_10;1{ic}|inv_20_1@1||16.75|3.5|||D5G4;
Iinv_160_80;1{ic}|inv_160_@1||29.25|3.5|||D5G4;
Ngeneric:Invisible-Pin|pin@1||5|-3.25|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 0 pulse 0 5 25n 1n 1n 50n 100n,vdd vdd 0 dc 5,Cl out 0 30p,.include C5_models.txt,.tran 0 200n]
NWire_Pin|pin@8||-3.25|3.5||||
NWire_Pin|pin@11||38.25|3.5||||
Awire|net@0|||0|inv_20_1@1|a|12.5|3.5|inv_20_1@0|a_b|11.5|3.5
Awire|net@4|||0|inv_160_@1|a|25|3.5|inv_20_1@1|a_b|23.5|3.5
Awire|out|D5G1;||1800|inv_160_@1|a_b|36|3.5|pin@11||38.25|3.5
Awire|vin|D5G1;||0|inv_20_1@0|a|0.5|3.5|pin@8||-3.25|3.5
X

# Cell inv_sim;2{sch}
Cinv_sim;2{sch}||schematic|1269479742999|1270689678630|
Ngeneric:Facet-Center|art@0||0|0||||AV
Iinv_20_10;1{ic}|inv_20_1@0||4.75|3.5|||D5G4;
Ngeneric:Invisible-Pin|pin@1||5|-3.25|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 0 pulse 0 5 25n 1n 1n 50n 100n,vdd vdd 0 dc 5,Cl out 0 30p,.include C5_models.txt,.tran 0 200n]
NWire_Pin|pin@8||-3.25|3.5||||
NWire_Pin|pin@9||14.5|3.5||||
Awire|out|D5G1;||1800|inv_20_1@0|a_b|11.5|3.5|pin@9||14.5|3.5
Awire|vin|D5G1;||0|inv_20_1@0|a|0.5|3.5|pin@8||-3.25|3.5
X

# Cell inv_sim;1{sch}
Cinv_sim;1{sch}||schematic|1269479742999|1269480593302|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||3.5|1|-1.5|-2||
NGround|gnd@1||16.5|-13.25|-1.5|-2||
NTransistor|nmos@0||1.5|5.25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NTransistor|nmos@1||14.5|-9|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
Ngeneric:Invisible-Pin|pin@1||-8.5|11|||||SIM_spice_card(D5G1;)S[vin vin 0 DC 0,vdd vdd 0 dc 5,.include C5_models.txt,.dc vin 0 5 1m]
NWire_Pin|pin@2||-1|12.75||||
NWire_Pin|pin@3||-1|5.25||||
NWire_Pin|pin@4||12|-1.5||||
NWire_Pin|pin@5||12|-9||||
NWire_Pin|pin@6||12|8.5||||
NWire_Pin|pin@7||3.5|8.5||||
NTransistor|pmos@0||1.5|12.75|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D20.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NTransistor|pmos@1||14.5|-1.5|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NPower|pwr@0||3.5|17.5||||
NPower|pwr@1||16.5|3.25||||
Awire|net@0|||2700|gnd@0||3.5|2|nmos@0|s|3.5|3.25
Awire|net@3|||0|pmos@0|g|0.5|12.75|pin@2||-1|12.75
Awire|net@5|||1800|pin@3||-1|5.25|nmos@0|g|0.5|5.25
Awire|net@6|||900|pwr@0||3.5|17.5|pmos@0|d|3.5|14.75
Awire|net@8|||2700|gnd@1||16.5|-12.25|nmos@1|s|16.5|-11
Awire|net@9|||0|pmos@1|g|13.5|-1.5|pin@4||12|-1.5
Awire|net@10|||1800|pin@5||12|-9|nmos@1|g|13.5|-9
Awire|net@11|||900|pwr@1||16.5|3.25|pmos@1|d|16.5|0.5
Awire|net@12|||900|pin@4||12|-1.5|pin@5||12|-9
Awire|net@13|||2700|pin@4||12|-1.5|pin@6||12|8.5
Awire|net@14|||2700|nmos@0|d|3.5|7.25|pin@7||3.5|8.5
Awire|net@15|||0|pin@6||12|8.5|pin@7||3.5|8.5
Awire|out1|D5G1;||2700|pin@7||3.5|8.5|pmos@0|s|3.5|10.75
Awire|out2|D5G1;||2700|nmos@1|d|16.5|-7|pmos@1|s|16.5|-3.5
Awire|vin|D5G1;||900|pin@2||-1|12.75|pin@3||-1|5.25
X

# Cell inv_sp;1{sch}
Cinv_sp;1{sch}||schematic|1271120652767|1271120759980|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||1|-1.5|-1.5|-2||
NTransistor|nmos@0||-1|2.75|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D10.0|SIM_spice_model(D5G0.5;X-0.5;Y-2.25;)SNMOS
NWire_Pin|pin@0||-3.5|10.25||||
NWire_Pin|pin@1||-3.5|2.75||||
Ngeneric:Invisible-Pin|pin@2||7.5|6.5|||||SIM_spice_card(D5G1;)S[vin in 0 DC 0,vdd vdd 0 dc 5,.include C5_models.txt,.dc vin 0 5 1m]
NTransistor|pmos@0||-1|10.25|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)D20.0|SIM_spice_model(D5G1;X0.25;Y-3.5;)SPMOS
NPower|pwr@0||1|15||||
Awire|in|D5G1;||900|pin@0||-3.5|10.25|pin@1||-3.5|2.75
Awire|net@0|||2700|gnd@0||1|-0.5|nmos@0|s|1|0.75
Awire|net@7|||0|pmos@0|g|-2|10.25|pin@0||-3.5|10.25
Awire|net@8|||1800|pin@1||-3.5|2.75|nmos@0|g|-2|2.75
Awire|net@9|||900|pwr@0||1|15|pmos@0|d|1|12.25
Awire|out|D5G1;||2700|nmos@0|d|1|4.75|pmos@0|s|1|8.25
X

# Cell junk;1{lay}
Cjunk;1{lay}||mocmos|1265077078911|1272329705851||DRC_last_good_drc_area_date()G1272329636131|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1272329636131
Ngeneric:Facet-Center|art@0||0|0||||AV
NPoly1-Poly2-Capacitor|cap@0||-84.25|57.25|||||CUT_spacing()D1.0E-13|SCHEM_capacitance(D5G5;)S100f
NMetal-1-Pin|pin@13||-84.25|17.5||||
NPolysilicon-1-Pin|pin@14||-116|40.25||||
NPolysilicon-1-Pin|pin@15||-116|57.25||||
APolysilicon-1|net@3|||S2700|pin@14||-116|40.25|pin@15||-116|57.25
APolysilicon-1|net@4|||S0|cap@0|a|-84.25|57.25|pin@15||-116|57.25
AMetal-1|net@6|||S900|cap@0|a|-84.25|57.25|pin@13||-84.25|17.5
EP2|P1|D5G2;|pin@14||U
EP1|P2|D5G2;|pin@13||U
X

# Cell junk;1{sch}
Cjunk;1{sch}||schematic|1272329449021|1272329526862|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-1|5.5||||
NOff-Page|conn@1||-1|-1.75||||
NWire_Pin|pin@1||3|-1.75||||
NWire_Pin|pin@2||3|5.5||||
NCapacitor|poly2cap@0||3|2.25||||2|SCHEM_capacitance(D5G1;)S100f
Awire|net@3|||900|poly2cap@0|b|3|0.25|pin@1||3|-1.75
Awire|net@4|||2700|poly2cap@0|a|3|4.25|pin@2||3|5.5
Awire|net@5|||1800|conn@0|y|1|5.5|pin@2||3|5.5
Awire|net@6|||1800|conn@1|y|1|-1.75|pin@1||3|-1.75
EP1||D5G2;|conn@0|a|U
EP2||D5G2;|conn@1|a|U
X

# Cell metal1_junk;1{lay}
Cmetal1_junk;1{lay}||mocmos|1265076951005|1265077057360|
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Pin|pin@0||-12|1||||
NMetal-1-Pin|pin@1||13|1||||
AMetal-1|net@0|||S1800|pin@0||-12|1|pin@1||13|1
EIn||D5G2;|pin@0||U
X

# Cell n_plus_1k;1{lay}
Cn_plus_1k;1{lay}||mocmos|1265683434446|1265684330416||DRC_last_good_drc_area_date()G1265683783581|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265683783581
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Pin|pin@0||1|22||||
NMetal-1-Pin|pin@1||-25|32||||
NMetal-1-Pin|pin@2||1.5|32||||
NMetal-1-Pin|pin@3||1.5|22||||
NN-Active-Resistor|resnactive@0||1|-2.5|||R||SCHEM_resistance(D5G4;)S750
NN-Active-Resistor|resnactive@1||-25|-2.5|||R||SCHEM_resistance(D5G4;)S750
NP-Active-Resistor|respactive@0||-70|-9||||
NMetal-1-P-Well-Con|substr@0||-12|-2.5||50||
AMetal-1|net@1|||S900|resnactive@0|right|1|22.5|pin@0||1|22
AMetal-1|net@2|||S2700|resnactive@1|right|-25|22.5|pin@1||-25|32
AMetal-1|net@3|||S1800|pin@1||-25|32|pin@2||1.5|32
AMetal-1|net@4|||S900|pin@2||1.5|32|pin@3||1.5|22
AMetal-1|net@5|||S1800|pin@0||1|22|pin@3||1.5|22
X

# Cell n_well;1{lay}
Cn_well;1{lay}||mocmos|1264470638170|1264471955642||DRC_last_good_drc_area_date()G1264471956928|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264471956928
Ngeneric:Facet-Center|art@0||0|0||||AV
NN-Well-Node|plnode@0||0|0|120|12||A
NN-Well-Node|plnode@1||0|-18|120|12||A
X

# Cell n_well_again;3{lay}
Cn_well_again;3{lay}||mocmos|1265682645498|1265682818802||DRC_last_good_drc_area_date()G1265682716160|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265682716160
Ngeneric:Facet-Center|art@0||0|0||||AV
Ngeneric:Invisible-Pin|pin@0||15.5|1|||||SIM_spice_card(D5G5;)SR1 L R 10k
NN-Well-Node|plnode@0||22.5|1|100|20||A
NMetal-1-N-Well-Con|well@0||-19|1||||
NMetal-1-N-Well-Con|well@1||66|1.5||||
EL||D5G5;|well@0||U
ER||D5G5;|well@1||U
X

# Cell n_well_again;2{lay}
Cn_well_again;2{lay}||mocmos|1265682645498|1265683249205||DRC_last_good_drc_area_date()G1265683317629|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265683317629
Ngeneric:Facet-Center|art@0||0|0||||AV
Ngeneric:Invisible-Pin|pin@0||15.5|1|||||SIM_spice_card(D5G5;)SR1 L R 10k
NN-Well-Pin|pin@1||66|1||||
NMetal-1-N-Well-Con|well@0||-19|1||||
NMetal-1-N-Well-Con|well@1||66|1.5||||
AN-Well|net@0||10|S1800|well@0||-19|1|pin@1||66|1
AN-Well|net@1|||S900|well@1||66|1.5|pin@1||66|1
EL||D5G5;|well@0||U
ER||D5G5;|well@1||U
X

# Cell n_well_again;1{lay}
Cn_well_again;1{lay}||mocmos|1265682645498|1265682818802||DRC_last_good_drc_area_date()G1265682716160|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265682716160
Ngeneric:Facet-Center|art@0||0|0||||AV
Ngeneric:Invisible-Pin|pin@0||15.5|1|||||SIM_spice_card(D5G5;)SR1 L R 10k
NN-Well-Node|plnode@0||22.5|1|100|20||A
NMetal-1-N-Well-Con|well@0||-19|1||||
NMetal-1-N-Well-Con|well@1||66|1.5||||
EL||D5G5;|well@0||U
ER||D5G5;|well@1||U
X

# Cell n_well_again;1{sch}
Cn_well_again;1{sch}||schematic|1265683021825|1265683209025|
Ngeneric:Facet-Center|art@0||0|0||||AV
Nartwork:Opened-Polygon|art@1||4.25|0|8.5|3|||trace()V[-4.25/0,-2.75/0,-2.25/1.5,-1.25/-1,-0.25/1.5,0.75/-1,1.25/1,1.25/1.5,2.25/-1.5,2.75/0,4.25/0]
NWire_Pin|pin@0||0|0.5||||
NWire_Pin|pin@1||8.5|0||||
Ngeneric:Invisible-Pin|pin@2||4|0.5|||||SIM_spice_card(D5G1;)SR1 L R 10k
EL||D5G2;|pin@0||U
ER||D5G2;|pin@1||U
X

# Cell pad;1{lay}
Cpad;1{lay}||mocmos|1265077157948|1265078317819||DRC_last_good_drc_area_date()G1265077817024|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265077817024
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-2-Metal-3-Con|contact@0||0|0|244|244||
NPassivation-Node|plnode@0||0|0|200|200||
Einout||D5G25;|contact@0||U
X

# Cell pad;1{sch}
Cpad;1{sch}||schematic|1265077533472|1265077554396|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||0|0||||
Einout||D5G2;|conn@0|a|U
X

# Cell rbit;1{ic}
Crbit;1{ic}||artwork|1272330744650|1272330784498|E
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|6|10|||SCHEM_function(D5G2;)Srbit|trace()V[-3/-5,-3/5,3/5,3/-5,-3/-5]
Nschematic:Bus_Pin|pin@0||0|-7|||R|
Nschematic:Wire_Pin|pin@1||0|-5|||R|
Nschematic:Bus_Pin|pin@2||0|7|||RRR|
Nschematic:Wire_Pin|pin@3||0|5|||RRR|
Aschematic:wire|net@0|||900|pin@1||0|-5|pin@0||0|-7
Aschematic:wire|net@1|||2700|pin@3||0|5|pin@2||0|7
Ebotr||D5G2;|pin@0||U
Etopr||D5G2;|pin@2||U
X

# Cell rbit;1{sch}
Crbit;1{sch}||schematic|1272330678436|1272330744651|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||1.5|10.75|||RRR|
NOff-Page|conn@1||1.5|0.75|||RRR|
NResistor|p2res@1||1.5|5.75|||R|9|ATTR_length(D5G0.25;X-1.5;)D2.0|ATTR_width(D5G0.5;X1.5;)D2.0|SCHEM_resistance(D5G1;Y-1.5;)S1k
Irbit;1{ic}|rbit@0||6.5|17.75|||D5G4;
Awire|net@0|||900|conn@0|y|1.5|8.75|p2res@1|b|1.5|7.75
Awire|net@1|||2700|conn@1|a|1.5|2.75|p2res@1|a|1.5|3.75
Ebotr||D5G2;|conn@1|y|U
Etopr||D5G2;|conn@0|a|U
X

# Cell rdivider;1{ic}
Crdivider;1{ic}||artwork|1272331260640|1272331288866|E
Ngeneric:Facet-Center|art@0||0|0||||AV
NOpened-Thicker-Polygon|art@1||0|0|6|10|||SCHEM_function(D5G2;)Srdivider|trace()V[-3/-5,-3/5,3/5,3/-5,-3/-5]
Nschematic:Bus_Pin|pin@0||0|-7|||R|
Nschematic:Wire_Pin|pin@1||0|-5|||R|
Nschematic:Bus_Pin|pin@2||0.25|7|||RRR|
Nschematic:Wire_Pin|pin@3||0.25|5|||RRR|
Aschematic:wire|net@0|||900|pin@1||0|-5|pin@0||0|-7
Aschematic:wire|net@1|||2700|pin@3||0.25|5|pin@2||0.25|7
EVREFM||D5G2;|pin@0||U
EVREFP||D5G2;|pin@2||U
X

# Cell rdivider;1{sch}
Crdivider;1{sch}||schematic|1272330803549|1272331262742|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||0.75|-18|||R|
NOff-Page|conn@1||0.75|16.25|||RRR|
NResistor|p2res@0||0.75|-13|||R|9|ATTR_length(D5G0.25;X-1.5;)D2.0|ATTR_width(D5G0.5;X1.5;)D2.0|SCHEM_resistance(D5G1;Y-1.5;)S1k
NBus_Pin|pin@0||0.75|-8.75||||
NBus_Pin|pin@1||0.75|10.5||||
Irbit;1{ic}|rbit[0:62]|D5G1;X5.5;Y0.25;|0.75|0.75|||D5G4;
Irdivider;1{ic}|rdivider@0||17.25|1|||D5G4;
Awire|net@0|||2700|conn@0|y|0.75|-16|p2res@0|a|0.75|-15
Awire|net@3|||900|conn@1|y|0.75|14.25|pin@1||0.75|10.5
Abus|r[0:62]|D5G1;||IJ900|rbit[0:62]|botr|0.75|-6.25|pin@0||0.75|-8.75
Awire|r[0]|D5G1;||2700|p2res@0|b|0.75|-11|pin@0||0.75|-8.75
Abus|r[1:62],VREFP|D5G1;||IJ2700|rbit[0:62]|topr|0.75|7.75|pin@1||0.75|10.5
EVREFM||D5G2;|conn@0|a|U
EVREFP||D5G2;|conn@1|a|U
X

# Cell sim_rdiv;1{sch}
Csim_rdiv;1{sch}||schematic|1272331350842|1272331398308|
Ngeneric:Facet-Center|art@0||0|0||||AV
NGround|gnd@0||-0.5|3.5||||
Ngeneric:Invisible-Pin|pin@0||9.5|15.75|||||SIM_spice_card(D5G1;)S[vdd vdd 0 dc 5,.tran 0 1]
NPower|pwr@0||-0.25|24.25||||
Irdivider;1{ic}|rdivider@0||-0.5|14|||D5G4;
Awire|net@0|||900|rdivider@0|VREFM|-0.5|7|gnd@0||-0.5|5.5
Awire|net@1|||900|pwr@0||-0.25|24.25|rdivider@0|VREFP|-0.25|21
X

# Cell welcome;1{lay}
Cwelcome;1{lay}||mocmos|1225555651218|1257524952031|
Ngeneric:Facet-Center|art@0||0|0||||AV
Ngeneric:Invisible-Pin|pin@0||0|0|||||ART_message(D5G4;)S[Welcome to ECE 5/410,Spring 2010]
X