Mosis notes

Update

An update of the method seen below - you can use https://www.mosis.com/Webforms/new_project_scmos.html instead of sending the NEW Project request by email.

Next fill out the Fabricate Form, https://www.mosis.com/Webforms/fabricate.html.

You can then FTP your GDS directly to MOSIS, avoiding the need to UUE the file.

Old, but still useful.

LASI notes

· Some LASI examples are found here.

· Use 100 LASI units per um in the CIF2TLC or GDS2TLC converter.

· Remember to do a TLCin after the conversion (to register the cells).

· To verify that the sizes matched correctly check to see if a contact is 2 lambda by 2 lambda.

· If the contacts measure this size then the cells were translated without error.

· While it’s preferable to use GDS, you can convert from CIF using mosis.lyr using LASI.

Below is the basic email that needs to be sent to mosis@mosis.com when requesting a new-project. The account number and password are supplied by mosis when the account is setup. The design name and password are selected by the person submitting the chip. Information concerning the technology code and lambda can be found at http://www.mosis.com/. The code SCNA (scalable cmos n-well analog) and a lambda of 0.8 indicate that AMI's 1.5um process is used (ABN). A technology code of SCN3ME_SUBM (the submicron scalable design rules used in Lasidrc) and a lambda of 0.3 indicate AMI’s 0.5 um processs is used (C5 with two poly layers and 3 levels of metal). If you use a tech code like “AMI-C5” this indicates YOU ARE NOT using the MOSIS design rules so the layer numbers will be different in the gds file (this will justifiably confuse the MOSIS system and it will tell you things like “metal1 not found”). At the very end of the email I use REQUEST: END to indicate that I am not going to make additional requests in the email. (Note that using capitals or lower case letters is allowed.)

REQUEST: NEW-PROJECT

CUSTOMER-ACCOUNT-NUMBER: My-schools-account

CUSTOMER-ACCOUNT-PASSWORD: My-schools-password

DESIGN-NAME: chips

DESIGN-PASSWORD: design1

NET-ADDRESS: hotchips@hotmail.com

FILL-AUTHORIZED: Yes

PHONE-NUMBER: 123-123-1234

TECHNOLOGY-CODE: SCN3ME_SUBM

LAMBDA: 0.3

FOUNDRY: AMI

FAB-OPTIONS:

INTENDED-DISPOSITION: Research

DESIGN-KIT-VERSION:

PAD-COUNT: 40

DESIGN-SIZE: 1500 x 1500

PO-NUMBER:

DESCRIPTION: test structures

QUANTITY-PACKAGED: 5

PACKAGE-NAME: DIP40

BONDING-DIAGRAM-SUPPLIER:

QUANTITY-UNPACKAGED: 0

QUANTITY-ORDERED: 5

ROUTING-LABEL:

QUOTE-ID:

RUN-TYPE:

IP-INCLUDED:

SPECIAL-HANDLING:

ATTENTION:

REQUEST: END

MOSIS sends an email to the net-address listed above indicating a project ID (55555). At this point we should write down (or store in some place electronically) this ID and the design name/password.

Note the "Fill-AUTHORIZED" is used to aid with CMP (chemical mechanical polishing) of the inter layer dielectric. For example, your chip may be covered with poly over only 5% of it's total area. In order for the CMP to reliably level and flatten the dielectric between metal1 and poly additional "Fill" poly will be added in certain areas. This shouldn't have any effect on your circuit's operation.

But what if the design is a big photodiode made using n+ in the p-substrate? There likely won’t be enough space to add poly fill to get the amount of poly up to the minimum required for proper polishing via CMP. Poly fill can’t be placed over active since poly over active (n+ or p+) forms a MOSFET. Remember that your chip is one of many on the wafer. It’s likely that the fill added to other chips around yours will be enough to meet the CMP requirements (especially if your chip is relatively small).

Next, assuming the designs were laid out with the MOSIS design rules (contacts/vias are drawn 2 by 2) we can download a padframe here in GDS or CIF or, if using the ABN or C5 processes, download one of the padframes already translated into LASI tld format here. If we download the GDS file from MOSIS for the process we are using we can convert it to a TLC files using the GDS2TLC utility on the system menu. In this utility first click on the setup menu item and select the GDS file you just downloaded. Next the utility will want you to select a layout datatype map, *.ldm, file. I usually leave this blank. GDS2TLC will generate the file automatically when you run the utility. You will have to click yes a bunch of times to indicate you want the layers mapped into the ldm file. At the end of the conversion GDS2TLC will indicate that it can be run again with the layout datatype map file just generated... I don't run the utility again I just then do an Import from LASI to register the cell). Next select um for the physcial units and 100 internal units per physcial units (not doing this results in a scaling factor error which is easily adjusted in LASI). You will see several possible padframes described in the documenation at the location of the download. I general just use the analog pads (even for the digital circuits). This will show the students how buffers can be used (as they are used in the digital padframe) to keep from loading the on-chip circuitry. For a tiny-chip in AMI's 1.5 um process the size of the padframe should be 2750 by 2750. After scaling, discussed below, by 0.8, the size of the tiny-chip is 2200 x 2200.

OK, the students submit the DRC checked designs (as TLC/TLD files) in the MOSIS design rules. The utility TLC2GDS is used to convert the designs to GDS files for submission. An important step at this point is to set the lambda of the process you are using (0.8 here in the box in the TLC2GDS setups). The TLC2GDS not only converts the TLC file into a GDS file but will also scale the entire chip by lambda. MOSIS wants to receive a layout that is the actual size of the final chip not the drawn size (and that is why we specify 2200 by 2200 in the email above). Until you feel comfortable with this process you might want to make a dummy design directory and stream the file back into LASI (reconvert the GDS file back into LASI TLCs to see that indeed the design has been scaled by the correct amount). The chip should be roughly 2200 by 2200 in the AB process (a "tiny chip").

The next step is to take the GDS file, say design1.gds, and uuencode it. On the LASI system menu click on the button LasiCode. This utility will uuencode the gds file (design1.gds here) calling it design1.uue. It will also generate two numbers: crcchecksum and the filelength (both used in the next email shown below). The file you send to MOSIS is design1.uue.

Next, I tried to email the following request to mosis@mosis.com with the uue file as an attachment. For some reason, with my new mail program, the first line of the uue file is ignored. (It did work OK with my previous email program.) To solve this problem I made a (single) text file using wordpad with the requests and information at the beginning of the file (the stuff shown below) and then I insert the uue file (as text) after the LAYOUT: line. I send the single file as an attachment in an email with nothing in the main body. The MOSIS system is really well done so that if you made a mistake you can generally tell by the automated responses.

REQUEST: FABRICATE

DESIGN-NUMBER: 55555

DESIGN-PASSWORD: design1

LAYOUT-FORMAT: UUGDS

CRC-CHECKSUM: 2397826573 198498

TOP-STRUCTURE: chipfinal1

ATTENTION:

LAYOUT:

REQUEST: END

Some other useful requests.

REQUEST: STATUS
DESIGN-NUMBER: 55555

DESIGN-PASSWORD: design1